
// Library name: VLSI_PROJECT
// Cell name: amk_inverter
// View name: schematic
subckt amk_inverter VDD VSS in out
    T1 (out in VDD VDD) lppfet l=120.0n w=320.0n nf=1 m=1 par=1 ngcon=1 \
        ad=1.76e-13 as=1.76e-13 pd=1.74u ps=1.74u nrd=0.5625 nrs=0.5625 \
        rf_rsub=1 plnest=-1 plorient=-1 pld200=-1 pwd100=-1 lstis=1 lnws=0 \
        rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p panw4=0p panw5=0p \
        panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p sa=5.5e-07 \
        sb=5.5e-07 sd=0u dtemp=0
    T0 (out in VSS VSS) lpnfet l=120.0n w=160.0n nf=1 m=1 par=1 ngcon=1 \
        ad=8.8e-14 as=8.8e-14 pd=1.42u ps=1.42u nrd=1.5652 nrs=1.5652 \
        rf_rsub=1 plnest=-1 plorient=-1 pld200=-1 pwd100=-1 lstis=1 lnws=0 \
        rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p panw4=0p panw5=0p \
        panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p sa=5.5e-07 \
        sb=5.5e-07 sd=0u dtemp=0
ends amk_inverter
// End of subcircuit definition.

// Library name: VLSI_PROJECT
// Cell name: simple_switch
// View name: schematic
subckt simple_switch VDD VSS cntrl in out
    T0 (out cntrl in VSS) lpnfet l=120.0n w=1u nf=1 m=1 par=1 ngcon=1 \
        ad=5.5e-13 as=5.5e-13 pd=3.1u ps=3.1u nrd=0.18 nrs=0.18 rf_rsub=1 \
        plnest=-1 plorient=-1 pld200=-1 pwd100=-1 lstis=1 lnws=0 \
        rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p panw4=0p panw5=0p \
        panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p sa=5.5e-07 \
        sb=5.5e-07 sd=0u dtemp=0
    I0 (VDD VSS cntrl net8) amk_inverter
    T1 (out net8 in VDD) lppfet l=120.0n w=1u nf=1 m=1 par=1 ngcon=1 \
        ad=5.5e-13 as=5.5e-13 pd=3.1u ps=3.1u nrd=0.18 nrs=0.18 rf_rsub=1 \
        plnest=-1 plorient=-1 pld200=-1 pwd100=-1 lstis=1 lnws=0 \
        rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p panw4=0p panw5=0p \
        panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p sa=5.5e-07 \
        sb=5.5e-07 sd=0u dtemp=0
ends simple_switch
// End of subcircuit definition.

// Library name: VLSI_PROJECT
// Cell name: an_switch
// View name: schematic
subckt an_switch VDD VSS cntrl in0 in1 sel_out
    I0 (VDD VSS cntrl cntrlb) amk_inverter
    T2 (sel_out cntrlb in0 VSS) lpnfet l=120.0n w=160.0n nf=1 m=1 par=1 \
        ngcon=1 ad=8.8e-14 as=8.8e-14 pd=1.42u ps=1.42u nrd=1.5652 \
        nrs=1.5652 rf_rsub=1 plnest=-1 plorient=-1 pld200=-1 pwd100=-1 \
        lstis=1 lnws=0 rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p \
        panw4=0p panw5=0p panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p \
        sa=5.5e-07 sb=5.5e-07 sd=0u dtemp=0
    T1 (sel_out cntrl in1 VSS) lpnfet l=120.0n w=160.0n nf=1 m=1 par=1 \
        ngcon=1 ad=8.8e-14 as=8.8e-14 pd=1.42u ps=1.42u nrd=1.5652 \
        nrs=1.5652 rf_rsub=1 plnest=-1 plorient=-1 pld200=-1 pwd100=-1 \
        lstis=1 lnws=0 rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p \
        panw4=0p panw5=0p panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p \
        sa=5.5e-07 sb=5.5e-07 sd=0u dtemp=0
    T3 (sel_out cntrl in0 VDD) lppfet l=120.0n w=160.0n nf=1 m=1 par=1 \
        ngcon=1 ad=8.8e-14 as=8.8e-14 pd=1.42u ps=1.42u nrd=1.5652 \
        nrs=1.5652 rf_rsub=1 plnest=-1 plorient=-1 pld200=-1 pwd100=-1 \
        lstis=1 lnws=0 rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p \
        panw4=0p panw5=0p panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p \
        sa=5.5e-07 sb=5.5e-07 sd=0u dtemp=0
    T0 (sel_out cntrlb in1 VDD) lppfet l=120.0n w=160.0n nf=1 m=1 par=1 \
        ngcon=1 ad=8.8e-14 as=8.8e-14 pd=1.42u ps=1.42u nrd=1.5652 \
        nrs=1.5652 rf_rsub=1 plnest=-1 plorient=-1 pld200=-1 pwd100=-1 \
        lstis=1 lnws=0 rgatemod=0 rbodymod=0 panw1=0p panw2=0p panw3=0p \
        panw4=0p panw5=0p panw6=0p panw7=0p panw8=0p panw9=0p panw10=0p \
        sa=5.5e-07 sb=5.5e-07 sd=0u dtemp=0
ends an_switch
// End of subcircuit definition.

// Library name: VLSI_PROJECT
// Cell name: cap_dac
// View name: schematic
V0 (comp_in net042) vsource dc=0 type=dc
V1 (comp_in net0140) vsource dc=0 type=dc
V2 (comp_in net0143) vsource dc=0 type=dc
V3 (comp_in net0146) vsource dc=0 type=dc
V4 (comp_in net0149) vsource dc=0 type=dc
V5 (comp_in net052) vsource dc=0 type=dc
V6 (comp_in net0158) vsource dc=0 type=dc
V7 (comp_in net056) vsource dc=0 type=dc
V8 (comp_in net058) vsource dc=0 type=dc
V9 (comp_in net0152) vsource dc=0 type=dc
I34 (VDD VSS reset VSS comp_in) simple_switch
I28 (VDD VSS in5 VSS Vref net52) an_switch
I32 (VDD VSS in1 VSS Vref net32) an_switch
I30 (VDD VSS in3 VSS Vref net42) an_switch
I29 (VDD VSS in4 VSS Vref net47) an_switch
I31 (VDD VSS in2 VSS Vref net37) an_switch
I33 (VDD VSS in0 VSS Vref net27) an_switch
I26 (VDD VSS in7 VSS Vref net62) an_switch
I27 (VDD VSS in6 VSS Vref net57) an_switch
I25 (VDD VSS in8 VSS Vref net67) an_switch
I24 (VDD VSS in9 VSS Vref net72) an_switch
CM12 (VSS comp_in VSS) mimcap l=8.5u w=5.24u c=95.62136f m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM9 (net27 net042 VSS) mimcap l=8.5u w=5.24u c=95.62136f m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM8 (net32 net0140 VSS) mimcap l=8.5u w=10.63u c=191.2346f m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM7 (net37 net0143 VSS) mimcap l=8.5u w=21.41u c=382.461f m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM6 (net42 net0146 VSS) mimcap l=8.5u w=42.97u c=764.9138f m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM5 (net47 net0149 VSS) mimcap l=8.5u w=86.04u c=1.528933p m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM4 (net72 net0152 VSS) mimcap l=8.5u w=2.75976m c=48.95805p m=1 par=1 \
        est=1 tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM3 (net52 net052 VSS) mimcap l=8.5u w=172.29u c=3.058921p m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM2 (net57 net0158 VSS) mimcap l=8.5u w=344.8u c=6.119076p m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM1 (net62 net056 VSS) mimcap l=8.5u w=689.8u c=12.23903p m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
CM0 (net67 net058 VSS) mimcap l=8.5u w=1.3798m c=24.47894p m=1 par=1 est=1 \
        tlev1=3 tlev2=2 bp=3 setind=-2 rsx=50 dtemp=0
